| dc.description.abstract | All modern computers have memories built from VLSI RAM chips.
Individually, these devices are highly reliable and any single chip
may perform for decades before failing. However, when many of the
chips are combined in a single memory, the time that at least one
of them fails could decrease to mere few hours. The presence of
the failed chips causes errors when binary data are stored in and
read out from the memory. As a consequence the reliability of the
computer memories degrade. These errors are classified into hard
errors and soft errors. These can also be termed as permanent and
temporary errors respectively.
In some situations errors may show up as random errors, in
which both 1-to-O errors and 0-to-l errors occur randomly in a
memory word. In other situations the most likely errors are
unidirectional errors in which 1-to-O errors or 0-to-l errors may
occur but not both of them in one particular memory word.
To achieve a high speed and highly reliable computer, we need
large capacity memory. Unfortunately, with high density of
semiconductor cells in memory, the error rate increases
dramatically. Especially, the VLSI RAMs suffer from soft errors
caused by alpha-particle radiation. Thus the reliability of
computer could become unacceptable without error reducing schemes.
In practice several schemes to reduce the effects of the memory
errors were commonly used. But most of them are valid only for hard errors. As an efficient and economical method, error control
coding can be used to overcome both hard and soft errors.
Therefore it is becoming a widely used scheme in computer industry
today.
In this thesis, we discuss error control coding for
semiconductor memories. The thesis consists of six chapters.
Chapter one is an introduction to error detecting and correcting
coding for computer memories. Firstly, semiconductor memories and
their problems are discussed. Then some schemes for error reduction
in computer memories are given and the advantages of using error
control coding over other schemes are presented.
In chapter two, after a brief review of memory organizations,
memory cells and their physical constructions and principle of
storing data are described. Then we analyze mechanisms of various
errors occurring in semiconductor memories so that, for different
errors different coding schemes could be selected.
Chapter three is devoted to the fundamental coding theory. In
this chapter background on encoding and decoding algorithms are
presented.
In chapter four, random error control codes are discussed.
Among them error detecting codes, single* error correcting/double
error detecting codes and multiple error correcting codes are
analyzed. By using examples, the decoding implementations for
parity codes, Hamming codes, modified Hamming codes and majority
logic codes are demonstrated. Also in this chapter it was shown
that by combining error control coding and other schemes, the reliability of the memory can be improved by many orders.
For unidirectional errors, we introduced unordered codes in
chapter five. Two types of the unordered codes are discussed. They
are systematic and nonsystematic unordered codes. Both of them are
very powerful for unidirectional error detection. As an example of
optimal nonsystematic unordered code, an efficient balanced code
are analyzed. Then as an example of systematic unordered codes
Berger codes are analyzed. Considering the fact that in practice
random errors still may occur in unidirectional error memories,
some recently developed t-random error correcting/all
unidirectional error detecting codes are introduced. Illustrative
examples are also included to facilitate the explanation.
Chapter six is the conclusions of the thesis.
The whole thesis is oriented to the applications of error
control coding for semiconductor memories. Most of the codes
discussed in the thesis are widely used in practice. Through the
thesis we attempt to provide a review of coding in computer
memories and emphasize the advantage of coding. It is obvious that
with the requirement of higher speed and higher capacity
semiconductor memories, error control coding will play even more
important role in the future. | |
