Analysis of improvement for turn on/off performance of the MOSFET gate drive waveform

Abstract

This thesis shows that the gate waveform of a power MOSFET driven by a specialized driver chip used in industry is imperfect and induces increased power loss in the MOSFET and lowers overall efficiency. The accurate measurements and analysis of the RLC parameters for the transmission line connecting the driver to the MOSFET are presented and a mathematical model for the line is developed based on ABCD parameters. The transmission line is characterized by experimentally measuring the frequency response of the line and extracting the parameters of the line using the mathematical model. Spice simulations and experimental results confirm the results of the extraction process. The simplified Spice model of the power MOSFET driver is developed in conjunction with the transmission line model and simulated with power source circuitry to match the experimental results. Length of the transmission line is changed in Spice simulation to confirm the dependency of length of the line with the performance of the driver. Finally, the slew rate of the gate waveform is shown to improve by inserting a capacitor to split up the transmission line in half. The result is confirmed experimentally.