Optimum switch sizing for class DE amplifier

Abstract

Recently, integrated class DE ampli fiers without matching networks have been proposed as a compact solution to drive a multi-element piezoelectric ultrasound transducer array for high-intensity focused ultrasound (HIFU) therapy. These transducers produce acoustic energy that translates into heat for tissue ablation. In order to steer the focal zone, each element in the transducer array is driven at a different phase. Hence, there's a need for the power amplifi er with a digital control unit in this application. Since each element in the transducer array has a different electrical characteristic and they have to be driven at the same frequency, it is a challenge to drive all transducers in the array at their optimum conditions. This work introduces strategies to determine efficient driving parameters for an entire transducer array. In addition. a method to improve the power efficiency of the class DE amplifi er by choosing the optimum size for switching MOSFETs is also proposed. During the operation of a class DE ampli fier, losses are caused by the ON resistance and the drivers of the MOSFET gate capacitances. These parameters are directly dependent on the size of the switching MOSFETs. A wider MOSFET will have a higher gate capacitance, but lower ON resistance. With the correct sizing, these losses can be greatly reduced to improve power efficiency and prevent excessive heating. The challenge with this method is the wide selection of transducers with varying impedance. As the load impedance changes, the MOSFET size also needs to be changed to maintain the maximum power efficiency. Also, the proposed design must deliver at least 1 W output power to the transducer in order to produce enough acoustic pressure. This output requirement will limit the available technology that can be used to design the amplifi er. In addition, this work also proposes a new driving circuit that consumes less power to operate, and also allows a full 0-360 degree phase shift. The design is simulated with Spectre simulator using 0.35 m 50V CMOS process data available from Austria Micro Systems. The proposed design can deliver 1422mW of average power to 6-elements transducer array, and achieve up to 91% power efficiency.