Modeling and analysis of limit cycles in buck converters under PI control
Master of Science
Electric current converters
Step-down (buck) converters
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A zero order hold equivalent discrete-time model of the buck converter for computing its large signal frequency-response is developed and experimentally verified. It is shown that with a dc bias and a sinusoidal variation of the input duty cycle, the frequency-response of the output voltage from the converter shifts from underdamped behaviour to damped behaviour with increasing amplitude of the input sinusoid. It is observed th at with a given dc input bias and a given input amplitude beyond the range of the state-space averaged small signal model, the converter behaviour varies from exclusively continuous inductor current mode at low frequencies to behaviour with continuous and discontinuous inductor current modes at high frequencies. The use of this sinusoidal input large signal frequency-response in predicting limit cycles induced by feedback of output voltage using proportional and integral controllers for such converters is studied. Experimental results confirming the use of this large signal frequency-response are presented. Also the use of large signal model in predicting the steady-state behaviour is studied.