| dc.description.abstract | Voltage references are fundamental to mixed signal converters which are widely used in elec-
tronics. Hence there are signicant advantages in having the voltage reference operate with
less power while minimizing area consumption and maintaining performance. Past designs have
suered from issues related to process variations which adversely aect the temperature coe-
cient of the circuit output. To compensate for these process variations, a means to modify the
temperature coecient are proposed and experimentally veried with two circuit architectures.
Five test chip samples implement these architectures in a 0.35 m CMOS process. Design
methodologies for both architectures are presented. Design techniques include the use of a
high-swing cascode to improve Line Sensitivity while minimizing additional power consumption,
accounting for a well-matched layout, and the eect of leakage currents on the performance of
the circuit.
Layout schematics, performance gures, test methodologies and results are presented. Each
circuit dissipates less than 4 nW and operates down to 0.9 V or better with Line Sensitivity and
Power Supply Rejection Ratio of less than 0.15 %/V and -58 dB respectively, while consuming
an area of 0.053 mm2 or less. The experimental average and median temperature coecient was
less than 26 ppm/C and 22 ppm/C respectively in the 􀀀20 C to 80 C range, with the best
performance being less than 8.1 ppm/C. Areas of improvement and potential areas of future
research are then identied to facilitate advancement of this work. | en_US |
